
PEELTM 22CV10A
0
2
9
I/CLK
10
20
I
21
33
I
34
48
I
49
65
I
66
82
I
83
97
I
98
110
I
111
121
I
124
130
I
131
I
Figure 3. PEEL™22CV10A Logic Array Diagram
ASYNCHRONOUS CLEAR
(TO ALL MACROCELLS)
MACRO
I/O
CELL
MACRO
I/O
CELL
MACRO
I/O
CELL
MACRO
I/O
CELL
I/O
MACRO
CELL
MACRO
I/O
CELL
MACRO
I/O
CELL
MACRO
I/O
CELL
MACRO
I/O
CELL
MACRO
I/O
CELL
SYNCHRONOUS PRESET
(TO ALL MACROCELLS)
I
2 of 10
04-02-009F