MAX1706D(1997) 查看數據表（PDF） - Maxim Integrated

零件编号

产品描述 (功能)

生产厂家

MAX1706D
(Rev.:1997)

1- to 3-Cell, High-Current, Low-Noise, Step-Up DC-DC Converters with Linear Regulator

Maxim Integrated 

1- to 3-Cell, High-Current, Low-Noise,

Step-Up DC-DC Converters with Linear Regulator

______________________________________________________________Pin Description

PIN

NAME

FUNCTION

1

LBP

Low-Battery Comparator Noninverting Input. Common-mode range is 0.5V to 1.5V.

2

LBN

Low-Battery Comparator Inverting Input. Common-mode range is 0.5V to 1.5V.

3

REF

1.250V Reference Output. Bypass REF with a 0.33µF capacitor to GND. REF can source up to 50µA.

Track-Mode Control Input for DC-DC Converter. In track mode, the boost-converter output is sensed at

4

TRACK OUT and set 0.3V above LDO to improve efficiency. Set TRACK to OUT for track mode. Connect TRACK to

GND for normal operation.

5

GND

Ground

6

OUT

Step-Up Converter Feedback Input, used during track mode. IC power and low-dropout linear-regulator

input. Bypass OUT to GND with a 0.1µF ceramic capacitor placed as close to the IC as possible.

7

FB

Step-Up DC-DC Converter Feedback Input. Connect FB to a resistor voltage divider between POUT and

GND to set the output voltage between 2.5V and 5.5V. FB regulates to 1.233V.

8

FBLDO

Low-Dropout Linear-Regulator Feedback Input. Connect FBLDO to a resistor voltage divider between LDO

to GND to set the output voltage from 1.25V to VOUT - 0.3V (5.0V max). FBLDO regulates to 1.250V.

9

LDO

Low-Dropout Linear-Regulator Output. LDO sources up to 200mA. Bypass to GND with a 22µF capacitor.

10

LBO

Low-Battery Comparator Output. This open-drain, N-channel output is low when LBP < LBN.

Input hysteresis is 16mV.

Switching-Mode Selection and External-Clock Synchronization Input:

• CLK/SEL = low: low-power, low-quiescent-current PFM mode.

• CLK/SEL = high: low-noise, high-power PWM mode. Switches at a constant frequency (300kHz). Full

11

CLK/SEL

output power is available.

• CLK/SEL = driven with an external clock: low-noise, high-power synchronized PWM mode.

Synchronizes to an external clock (from 200kHz to 400kHz).

Turning on the DC-DC converter with CLK/SEL = GND also serves as a soft-start function,

since peak inductor current is reduced.

12

PGND Power Ground for the source of the N-channel power MOSFET switch

13

LX

Inductor connection to the drains of the P-channel synchronous rectifier and N-channel switch

14

ONB

Off Control Input. When ONB = high and ONA = low, the IC is off. Connect ONB to GND for normal

operation (Table 2).

15

ONA

On Control Input. When ONA = high or ONB = low, the IC turns on. Connect ONA to OUT for normal

operation (Table 2).

Boost DC-DC Converter Power Output. POUT is the source of the P-channel synchronous-rectifier MOSFET

16

POUT switch. Connect an external Schottky diode from LX to POUT. The output current available from POUT is

reduced by the current drawn from the LDO linear-regulator output.

_______________________________________________________________________________________ 9

Share Link: