MAX11633(2014) 查看數據表（PDF） - Maxim Integrated

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MAX11633
(Rev.:2014)

12-Bit, 300ksps ADCs with FIFO and Internal Reference

Maxim Integrated 

MAX11626–MAX11629/

MAX11632/MAX11633

12-Bit, 300ksps ADCs

with FIFO and Internal Reference

Electrical Characteristics (continued)

(VDD = +2.7V to +3.6V (MAX11627/MAX11629/MAX11633); VDD = +4.75V to +5.25V (MAX11626/MAX11628/MAX11632), fSAMPLE

= 300kHz, fSCLK = 4.8MHz external clock (50% duty cycle), VREF = 2.5V (MAX11627//MAX11629/MAX11633); VREF = 4.096V

(MAX11626/MAX11628/MAX11632), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)

PARAMETER

CONVERSION RATE

Power-Up Time

Acquisition Time

Conversion Time

External Clock Frequency

Aperture Delay

Aperture Jitter

ANALOG INPUT

Input Voltage Range

Input Leakage Current

Input Capacitance

INTERNAL REFERENCE

REF Output Voltage

REF Temperature Coefficient

Output Resistance

REF Output Noise

REF Power-Supply Rejection

EXTERNAL REFERENCE INPUT

REF Input Voltage Range

SYMBOL

tPU

tACQ

tCONV

fSCLK

TCREF

PSRR

VREF

CONDITIONS

External reference

Internal reference (Note 3)

Internally clocked

Externally clocked (Note 4)

Externally clocked conversion

Data I/O

Unipolar

VIN = VDD

During acquisition time (Note 5)

MAX11626/MAX11628/MAX11632

MAX11627/MAX11629/MAX11633

MAX11626/MAX11628/MAX11632

MAX11627/MAX11629/MAX11633

MIN TYP MAX UNITS

0.8

µs

65

0.6

µs

3.5

µs

2.7

0.1

4.8

MHz

10

30

ns

< 50

ps

0

VREF

V

±0.01 ±1

µA

24

pF

4.024

2.48

4.096

2.50

±20

±30

6.5

200

-70

4.168

V

2.52

ppm/°C

kΩ

µVRMS

dB

1.0

VDD + 50mV V

REF Input Current

IREF

VREF = 2.5V (MAX11627/MAX11629/

MAX11633); VREF = 4.096V

(MAX11626/MAX11628/MAX11632),

fSAMPLE = 300ksps

VREF = 2.5V (MAX11627/MAX11629/

MAX11633); VREF = 4.096V

(MAX11626/MAX11628/MAX11632),

fSAMPLE = 0

40

100

µA

±0.1

±5

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