MAX11606 查看數據表（PDF） - Maxim Integrated

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MAX11606

Low-Power, 4-/8-/12-Channel, I2C, 10-Bit ADCs in Ultra-Small Packages

Maxim Integrated 

MAX11606–MAX11611

Low-Power, 4-/8-/12-Channel, I2C,

10-Bit ADCs in Ultra-Small Packages

Pin Description

PIN

MAX11606 MAX11607 MAX11608 MAX11610

MAX11607

MAX11609 MAX11611

µMAX

1, 2, 3

—

—

WLP

A1, A2, A3

—

—

QSOP

5, 6, 7

5, 6, 7

8–12

8–12

—

4, 3, 2

4

A4

—

—

—

—

1

—

—

—

—

1

5

C4

13

13

6

C3

14

14

7

B1–B4, C2

15

15

8

C1

16

16

—

—

2, 3, 4

—

NAME

FUNCTION

AIN0, AIN1, AIN2

AIN3–AIN7

Analog Inputs

AIN8, AIN9, AIN10

AIN3/REF

Analog Input 3/Reference Input or Output. Selected in

the setup register (see Tables 1 and 6).

REF

Reference Input or Output. Selected in the setup

register (see Tables 1 and 6).

AIN11/REF

Analog Input 11/Reference Input or Output. Selected in

the setup register (see Tables 1 and 6).

SCL

SDA

GND

VDD

N.C.

Clock Input

Data Input/Output

Ground

Positive Supply. Bypass to GND with a 0.1_F capacitor.

No Connection. Not internally connected.

A. F/S-MODE 2-WIRE SERIAL-INTERFACE TIMING

SDA

tSU:DAT

tLOW

tHD:DAT

SCL

tHD:STA

S

tHIGH

tR

tF

B. HS-MODE 2-WIRE SERIAL-INTERFACE TIMING

SDA

tSU:DAT

tLOW

tHD:DAT

SCL

tHD:STA

S

tHIGH

tRCL

tFCL

Figure 1. 2-Wire Serial-Interface Timing

8

tSU:STA

tHD:STA

tR

tF t

tBUF

tSU:STO

Sr

A

P

S

tRDA

tFDA

tSU:STA

tHD:STA

tBUF

tSU:STO

Sr

HS MODE

tRCL1

A

P

S

F/S MODE

Maxim Integrated

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