HYB5117405BJ-70 查看數據表（PDF） - Siemens AG

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HYB5117405BJ-70

4M x 4-Bit Dynamic RAM 2k & 4k Refresh (Hyper Page Mode- EDO)

Siemens AG 

HYB5116(7)405BJ/BT-50/-60/-70

4M x 4-EDO DRAM

V

IH

RAS

VIL

tRC

tRAS

tRCD

tRSH

V

IH

CAS

VIL

V

Address IH

VIL

tRAH

tASR

tRAD

tASC

tCAH

Row

Column

tWCS

tWCH

V

tWP

IH

WE

VIL

V

I/O

IH

(Input) VIL

tDS

tDH

Valid Data

tRC

tRP

tRP

tRAS

tCHR

tCRP

tWRP tWRH

tASR

Row

V

I/O

OH

(Output) VOL

HI-Z

“H” or “L”

WL12

Hidden Refresh Cycle (Early Write)

Semiconductor Group

22

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