C0402X7R1E102MT 查看數據表（PDF） - TDK Corporation

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C0402X7R1E102MT

MULTILAYER CERAMIC CHIP CAPACITORS

TDK Corporation 

General

Specifications

C Series – General Application

No. Item

Performance

Test or Inspection Method

15

Moisture Resistance (Steady State)

External

appearance

No mechanical damage.

Capacitance

Characteristics

Class 1 C0G

Class 2 X5R

X7R

Y5V

Change from the

value before test

±5% or ±0.5pF,

whichever larger.

± 25 %

± 25 %

± 30 %

Reflow solder the capacitor on P.C. board (shown in

Appendix 1a or Appendix 1b) before testing.

Leave at temperature 40±2ºC, 90 to 95%RH for 500

+24,0h.

Leave the capacitor in ambient conditions for 6 to 24h

(Class 1) or 24±2h (Class 2) before measurement.

Q

(Class 1)

Rated

Q

Capacitance

C ≥ 30pF

350 min.

10pF ≤ C < 30pF 275+5/2×C min.

C <10pF

200+10×C min.

C : Rated capacitance (pF)

D.F.

(Class 2)

Characteristics

X5R: 200% of initial spec. max.

X7R: 200% of initial spec. max

Y5V: 150% of initial spec. max

Insulation

Resistance

1,000MΩ or 50MΩ•μF min.

(As for the capacitors of rated voltage

16, 10 and 6.3V DC, 1,000 MΩ or

10MΩ•μF min.,) whichever smaller.

TDK MLCC US Catalog

Page 68

Version B11

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