ADC1002S020 查看數據表（PDF） - Integrated Device Technology
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ADC1002S020 Datasheet PDF : 18 Pages
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Integrated Device Technology
ADC1002S020
Single 10 bits ADC, up to 20 MHz
10. Characteristics
Table 6. Characteristics
VDDA = V7 to V9 = 3.3 V; VDDD = V4 to V3 = V18 to V19 = 3.3 V; VDDO = V20 to V21 = 3.3 V; VSSA, VSSD and VSSO shorted
together; Vi(p-p) = 1.83 V; CL = 20 pF; Tamb = 0 C to 70 C; typical values measured at Tamb = 25 C unless otherwise
specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Supplies
VDDA
analog supply voltage
3.0
3.3
VDDD1
digital supply voltage 1
3.0
3.3
VDDD2
digital supply voltage 2
3.0
3.3
VDDO
output supply voltage
3.0
3.3
VDD
supply voltage difference VDDA VDDD; VDDD VDDO;
0.2
-
VDDA VDDO
IDDA
analog supply current
-
7.5
IDDD
digital supply current
-
7.5
IDDO
output supply current fclk = 20 MHz; ramp input;
-
1
CL = 20 pF
Ptot
total power dissipation operating; VDDD = 3.3 V
-
53
standby mode
-
4
5.25
V
5.25
V
5.25
V
5.25
V
+0.2
V
10
mA
10
mA
2
mA
73
mW
-
mW
Inputs
Clock input CLK (Referenced to VSSD);[1]
VIL
LOW-level input voltage
VIH
HIGH-level input voltage VDDD 3.6 V
VDDD > 3.6 V
IIL
LOW-level input current VCLK = 0.3 VDDD
IIH
HIGH-level input current VCLK = 0.7 VDDD
Zi
input impedance
fclk = 20 MHz
Ci
input capacitance
fclk = 20 MHz
Inputs OE and STDBY (Referenced to VSSD); see Table 7 and 8
VIL
LOW-level input voltage
VIH
HIGH-level input voltage VDDD 3.6 V
VDDD > 3.6 V
IIL
LOW-level input current VIL = 0.3 VDDD
IIH
HIGH-level input current VIH = 0.7 VDDD
Analog input VI (Referenced to VSSA)
IIL
LOW-level input current VI = VRB
IIH
HIGH-level input current VI = VRT
Zi
input impedance
fi = 1 MHz
Ci
input capacitance
fi = 1 MHz
Reference voltages for the resistor ladder; see Table 8
0
-
0.6 VDDD
-
0.7 VDDD
-
1
0
-
-
-
4
-
3
0
-
0.6 VDDD
-
0.7 VDDD
-
1
-
-
-
-
0
-
35
-
5
-
8
0.3 VDDD V
VDDD
V
VDDD
V
+1
A
5
A
-
k
-
pF
0.3 VDDD V
VDDD
V
VDDD
V
-
A
1
A
-
A
-
A
-
k
-
pF
VRB
voltage on pin RB
VRT
voltage on pin RT
1.1
1.2
-
V
3.0
3.3
VDDA
V
ADC1002S020_3
Product data sheet
Rev. 03 — 2 July 2012
© IDT 2012. All rights reserved.
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