Data Sheet
INPUT
50V/DIV
OUTPUT
1V/DIV
500ns/DIV
Figure 22. Common-Mode Step Response, Rising
OUTPUT
1V/DIV
INPUT
50V/DIV
1µs/DIV
Figure 23. Common-Mode Step Response, Falling
180
150
120
90
60
30
0
–200
–100
0
100
200
VOSI (µV)
Figure 24. Input Offset Distribution
AD8218
500
400
300
200
100
0
–4
–3
–2
–1
0
1
2
3
4
GAIN DRIFT (ppm/°C)
Figure 25. Gain Drift Distribution
140
120
100
80
60
40
20
0
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
OFFSET DRIFT (µV/°C)
Figure 26. Input Offset Drift Distribution
250
200
150
100
50
0
–5
0
5
10
15
INTERNAL REF OFFSET DRIFT (µV/°C)
Figure 27. Internal REF Offset Drift Distribution,
Referred to Output (RTO)
Rev. B | Page 9 of 16