LC74793 查看數據表（PDF） - SANYO -> Panasonic

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LC74793

VPS / PDC Slicer IC

SANYO -> Panasonic 

LC74793, 74793JM

Command 0 (Clock Settings Command)

• First byte

DA 0 to 7

7

6

5

4

3

2

1

0

Register

—

—

—

—

—

—

—

—

Status

1

1

1

1

0

0

0

0

Contents

Function

First byte identification bit

Command 0 identification code.

Clock settings.

Notes

• Second byte

DA 0 to 7

7

6

Register

—

FS

5

FS2

4

FS3

3

—

2

TSTMOD

1

—

0

SYSRST

Status

0

0

1

0

1

0

1

0

0

1

0

0

1

Contents

Function

Second byte identification bit

FS

FS2

FS3

Setting

0

0

0

2FSC

1

0

0

4FSC (CDLR can be deleted)

0

1

1

FSC

0

0

1

2FSC (CDLR can be deleted)

Normal operating mode

Test mode

All registers are reset

Notes

Setting for the frequency input to the

XtalIN pin (pin 2).

CDLR can be deleted: The resistor

connected to the CDLR pin may be

removed.

This bit must be set to 0.

No. 5966-8/24

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