AD7394 查看數據表（PDF） - Analog Devices

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AD7394

+3 V, Dual, Serial Input 12-/10-Bit DACs

Analog Devices 

AD7395 10-BIT RAIL-TO-RAIL VOLTAGE OUT DAC

AD7394/AD7395

ELECTRICAL CHARACTERISTICS (@ VREF IN = 2.5 V, –40؇C < TA < +85؇C/+125؇C, unless otherwise noted)

Parameter

Symbol

Conditions

3 V ؎ 10% 5 V ؎ 10% Units

STATIC PERFORMANCE

Resolution1

Relative Accuracy2

Relative Accuracy2

Differential Nonlinearity2

Zero-Scale Error

Full-Scale Voltage Error

Full-Scale Voltage Error

Full-Scale Tempco3

REFERENCE INPUT

VREF IN Range

Input Resistance

Input Capacitance3

ANALOG OUTPUT

Output Current (Source)

Output Current (Sink)

Capacitive Load3

LOGIC INPUTS

Logic Input Low Voltage

Logic Input High Voltage

Input Leakage Current

Input Capacitance3

INTERFACE TIMING3, 5

Clock Width High

Clock Width Low

Load Pulsewidth

Data Setup

Data Hold

Clear Pulsewidth

Load Setup

Load Hold

N

INL

INL

DNL

VZSE

VFSE

VFSE

TCVFS

VREF

RREF

CREF

IOUT

IOUT

CL

VIL

VIH

IIL

CIL

tCH

tCL

tLDW

tDS

tDH

tCLRW

tLD1

tLD2

TA = +25°C

TA = –40°C, +85°C, +125°C

Monotonic

Data = 000H

TA = +25°C, +85°C, +125°C

Data = FFFH

TA = –40°C, Data = FFFH

Data = 200H, ∆VOUT = 5 LSB

Data = 200H, ∆VOUT = 5 LSB

No Oscillation

10

10

± 1.5

± 1.5

± 2.0

± 2.0

±1

±1

9.0

9.0

± 42

± 42

± 48

± 48

–35

–35

0/VDD

2.5

5

0/VDD

2.5

5

1

1

3

3

100

100

0.5

0.8

VDD–0.6 4.0

10

10

10

10

50

30

50

30

30

20

10

10

30

15

15

15

30

15

40

20

Bits

LSB max

LSB max

LSB max

mV max

mV max

mV max

ppm/°C typ

V min/max

MΩ typ4

pF typ

mA typ

mA typ

pF typ

V max

V min

µA max

pF max

ns min

ns min

ns min

ns min

ns min

ns min

ns min

ns min

AC CHARACTERISTICS

Output Slew Rate

Settling Time6

DAC Glitch

Digital Feedthrough

Feedthrough

SUPPLY CHARACTERISTICS

Power Supply Range

Shutdown Supply Current

Positive Supply Current

Power Dissipation

Power Supply Sensitivity

SR

tS

Q

Q

VOUT/VREF

VDD RANGE

IDD_SD

IDD

PDISS

PSS

Data = 000H to 3FFH to 000H

To ± 0.1% of Full Scale

Code 7FFH to 800H to 7FFH

VREF = 1.5 VDC +1 V p-p,

Data = 000H, f = 100 kHz

DNL < ± 1 LSB

SHDN = 0, VIL = 0 V, No Load

VIL = 0 V, No Load

VIL = 0 V, No Load

∆VDD = ± 5%

0.05

70

65

15

–63

2.7/5.5

0.1/1.5

125/200

600

0.006

0.05

60

65

15

–63

2.7/5.5

0.1/1.5

125/200

1000

0.006

V/µs typ

µs typ

nV/s typ

nV/s typ

dB typ

V min/max

µA typ/max

µA typ/max

µW max

%/% max

NOTES

1One LSB = VREF/4096 V for the 10-bit AD7395.

2The first two codes (000H, 001H) are excluded from the linearity error measurement.

3These parameters are guaranteed by design and not subject to production testing.

4Typicals represent average readings measured at +25°C.

5All input control signals are specified with tR = tF = 2 ns (10% to 90% of +3 V) and timed from a voltage level of 1.6 V.

6The settling time specification does not apply for negative going transitions within the last three LSBs of ground.

Specifications subject to change without notice.

REV. 0

–3–

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