VSC9112(2000) 查看數據表（PDF） - Vitesse Semiconductor
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VSC9112 Datasheet PDF : 2 Pages
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SONET/SDH IP/ATM Framer and Mapper
Framers
and
Mappers
VSC9112
Product Brief
Features:
System / Packet Interface
• 32-bit Industry Compliant
POS-PHY-3, Single-PHY
Packet Interface
• 32-bit Industry Compliant
UTOPIA-3, Single-PHY
Cell Interface
Physical Layer Channelization
Support
• STS-48c / STM-16c
Payload Processing
• Transparent Mode -
Direct SPE Mapping
• ATM Cell Processing
• Programmable HDLC / PPP
Encapsulation
SONET / SDH Processing
• Full Section, Line, and Path
Termination and Generation
• Performance Monitoring and
Reporting
• Enhanced Bit Error Rate
Monitoring
• Section and Path Trace Buffers
• Full Overhead Insertion and
Extraction and Status
Monitoring Through Dedicated
Access Ports
General Description
The VSC9112 is a dual mode STS-48c/
STM-16c Packet/ATM mapping device.
In Packet over SONET (POS) mode,
this device can be used in equipment
interconnecting IP/PPP/HDLC data
over public or private SONET/SDH net-
works. Similarly in the ATM mode, this
device can be used in equipment inter-
connecting enterprise ATM switches.
Features of the VSC9112 include: Full
insertion/extraction of the transport
overhead, bit error rate and extensive
SONET/packet/cell performance moni-
toring, packet/cell filtering and discard-
ing functionalities, transmit and receive,
JTAG TAP controller, and an 8-bit CPU
interface with 8 general purpose I/O
ports.
This highly integrated device provides
a complete low-power physical layer
solution on a single chip for Packet/ATM
over SONET/SDH at the STS-48 rate.
www.vitesse.com
Telecom Division
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