ML6510CQ-130 查看數據表（PDF） - Micro Linear Corporation

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ML6510CQ-130

Series Programmable Adaptive Clock Manager (PACMan™)

Micro Linear Corporation 

ML6510

BLOCK DIAGRAM

CLKINL CLKINH

RESET

LOCK

MDIN

R0MMSB

MCLK

MDOUT

M

PLL

N

R

MAXIMUM

DELAY

REF

CLOCK

RCLKH RCLKL

PIN CONNECTION

DESKEW BUFFER 0

PHASE

DETECTOR

SENSE

CIRCUIT

VOLTAGE

CONTROLLED

DELAY

DRIVE

CIRCUIT

FB0

(from remote chip)

CLK0

(to remote chip)

DESKEW BUFFER 1

DESKEW BUFFER 7

FB1

CLK1

FB7

CLK7

CLK3

DVCC23

CLK2

DGND2

FB2

FB1

DGND1

CLK1

DVCC01

CLK0

DGND0

6 5 4 3 2 1 44 43 42 41 40

7

39

8

38

9

37

10

36

11

ML6510

35

12

44-LEAD PLCC (Q44)

34

13

TOP VIEW

33

14

32

15

31

16

30

17

29

18 19 20 21 22 23 24 25 26 27 28

FB6

DGND6

CLK6

DVCC67

CLK7

DGND7

FB7

ROMMSB

AVCC2

AGND2

CLKINL

2

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