AD420ARZ-32-REEL(2011) 查看數據表（PDF） - Analog Devices
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AD420ARZ-32-REEL Datasheet PDF : 16 Pages
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AD420
APPLICATIONS INFORMATION
CURRENT OUTPUT
The AD420 can provide 4 mA–20 mA, 0 mA–20 mA, or 0 mA–
24 mA output without any active external components. Filter
capacitors C1 and C2 can be any type of low cost ceramic
capacitors. To meet the specified full-scale settling time of 3 ms,
low dielectric absorption capacitors (NPO) are required.
Suitable values are C1 = 0.01 μF and C2 = 0.01 μF.
0.1µF
VLL
VCC
0.1µF
C1 C2
RANGE
SELECT 1
RANGE
SELECT 2
CLEAR
LATCH
2
5
4
6
7
20
21
23
AD420
IOUT (4mA TO 20mA)
18
RLOAD
CLOCK
8
DATA IN
9
14
REF OUT
15
11
REF IN
GND
Figure 6. Standard Configuration
DRIVING INDUCTIVE LOADS
When driving inductive or poorly defined loads ,connect a 0.01 μF
capacitor between IOUT (Pin 18) and GND (Pin 11). This ensures
stability of the AD420 with loads beyond 50 mH. There is no
maximum capacitance limit. The capacitive component of the
load may cause slower settling, though this may be masked by
the settling time of the AD420. A programmed change in the
current may cause a back EMF voltage on the output that may
exceed the compliance of the AD420. To prevent this voltage
from exceeding the supply rails connect protective diodes
between IOUT and each of VCC and GND.
VOLTAGE-MODE OUTPUT
Since the AD420 is a single supply device, it is necessary to add
an external buffer amplifier to the VOUT pin to obtain a selection
of bipolar output voltage ranges as shown in Figure 7.
0.1µF
VCC
VLL
C1 C2
0.1µF
RANGE
SELECT 1
RANGE
SELECT 2
CLEAR
LATCH
2
5
4
6
7
20
21
23
AD420
VOUT
17
VOUT
R3
CLOCK
DATA IN
8
R1
R2
9
14
REF OUT
15
11
REF IN
GND
Figure 7.
Table 7. Buffer Amplifier Configuration
R1
R2
R3
Open
Open
0
Open
R
R
R
Open
R
R
2R
2R
VOUT
0V−5V
±5 V
±10 V
Suitable R = 5 kΩ.
OPTIONAL SPAN AND ZERO TRIM
For users who would like lower than the specified values of
offset and gain error, Figure 8 shows a simple way to trim these
parameters. Care should be taken to select low drift resistors
because they affect the temperature drift performance of
the DAC.
The adjustment algorithm is iterative. The procedure for
trimming the AD420 in the 4 mA–20 mA mode can be
accomplished as follows:
1. Offset adjust. Load all zeros. Adjust RZERO for
4.00000 mA of output current.
2. Gain adjust. Load all ones. Adjust RSPAN for 19.99976 mA
(FS − 1 LSB) of output current.
Return to Step I and iterate until convergence is obtained.
0.1µF
RANGE
SELECT 1
RANGE
SELECT 2
CLEAR
LATCH
CLOCK
VLL
C1 C2
2
5
20
21
4
6
AD420
7
8
VCC
0.1µF
23
5kΩ
RSPAN2
19 BOOST
IOUT (4mA TO 20mA)
18
RLOAD
DATA IN
9
14
REF OUT
15 16 11
500Ω
RSPAN
10kΩ GND
RZERO
Figure 8. Offset and Gain Adjust
Variation of RZERO between REF OUT (5 V) and GND leads
to an offset adjust range from −1.5 mA to 6 mA, (1.5 mA/V
centered at 1 V).
The 5 kΩ RSPAN2 resistor is connected in parallel with the
internal 40 W sense resistor, which leads to a gain increase of
+0.8%.
As RSPAN is changed to 500 Ω, the voltage on REF IN is
attenuated by the combination of RSPAN and the 30 kΩ REF IN
input resistance. When added together with RSPAN2 this
results in an adjustment range of −0.8% to +0.8%.
Rev. H | Page 10 of 16
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