Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH16S72AVJB-6
1,207,959,552-BIT ( 16,777,216-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
COMMAND TRUTH TABLE
COMMAND
Deselect
No Operation
MNEMONIC
CKE
n-1
CKE
n
/S
/RAS /CAS /WE BA0,1 A11
A10 A0-9
DESEL
H X HX
X XX
X
XX
NOP
H XLH
H HX
X
XX
Row Adress Entry &
Bank Activate
Single Bank Precharge
Precharge All Bank
ACT
PRE
PREA
H XLL
H XLL
H XLL
Column Address Entry
& Write
WRITE
H XLH
Column Address Entry
& Write with Auto-
WRITEA H X L H
Precharge
Column Address Entry
& Read
READ
H XLH
Column Address Entry
& Read with Auto
Precharge
Auto-Refresh
Self-Refresh Entry
Self-Refresh Exit
Burst Terminate
Mode Register Set
READA
REFA
REFS
REFSX
TBST
MRS
H XLH
H HLL
H L LL
L H HX
L HLH
H XLH
H XLL
H HV
H LV
H LX
L
LV
L
LV
L
HV
L
HV
L
HX
L
HX
X XX
H HX
H LX
L
LL
VVV
XL X
X HX
VL V
V HV
VL V
V HV
XXX
XXX
XXX
XXX
XXX
L L V*1
H =High Level, L = Low Level, V = Valid, X = Don't Care, n = CK cycle number
NOTE:
1.A7-9 = 0, A0-6 = Mode Address
MIT-DS-0414-0.1
MITSUBISHI
ELECTRIC
27/Mar. /2001 6