5962R9566901VCC 查看數據表（PDF） - Intersil

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5962R9566901VCC

Radiation Hardened Fast Sample and Hold

Intersil 

Test Circuits (Continued)

HS-2420RH

SEND SAMPLE

COMMAND

SET t2 TO 7µs

INITIALLY

ADTIGt1IT(I≈Z1E0µVs1)

DIGITIZE V2

AT t2

COURSE tACQ

MEASUREMENT LOOP

FINE tACQ

MEASUREMENT LOOP

INCREMENT t2

BY 50ns

(50ns LONGER DELAY)

DECREMENT

t2 BY 50ns

CALCULATE V1 - V2

IS ∆V ≥ 0.01%?

YES

NO

DECREMENT

t2 BY 50ns

RECORD

tACQ

ADTIGt1IT(≈IZ1E0µVs1)

DIGITIZE V2

AT t2

YES

NO

CALCULATE V1 - V2

IS ∆V ≥ 0.01%?

NOTE: See Test Diagram, Timing Diagram

FIGURE 4. ACQUISITION TIME (tACQ TO 0.01% IS SHOWN, tACQ TO 0.1% IS DONE IN THE SAME MANNER)

+10V

0V

0V

-10V

HS-2420RH

-

+

OR

S/H

CONTROL

-

+

1000pF

50pF

2kΩ

t1

≈10µs

DELAY

FIGURE 5.

t1

V1

V1 DIGITIZER

V2

V2 DIGITIZER

COMPUTER

CONTROLLER

t2

VARIABLE

DELAY

t2 DELAY

CONTROL

3

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