DESCRIPTION
   STP6625 is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application, noteook power management ane ther battery powered circuits where high-side witching.

FEATURE
● -60V/-5.0A, RDS(ON) = 60mΩ (Typ.)
                     @VGS =-10
● -60V/-3.0A, RDS(ON) = 85mΩ
                     @VGS = -4.5V
● Super high density cell design for
   extremely low RDS(ON)
● Exceptional on-resistance and maximum
   DC current capability
● SOP-8 package design