32-MHz, 32-bit RX MCUs with up to 256-KB flash memory,
2 low-noise and low-drift 24-bit delta-sigma A/D converters,
rail-to-rail programmable gain instrumentation amplifiers,
a low-drift voltage reference, and on-chip excitation current sources

FEATUREs
◾ 32-bit RXv2 CPU core
   • Max. operating frequency: 32 MHz
      Capable of 64 DMIPS in operation at 32 MHz
   • Enhanced DSP: 32-bit multiply-accumulate and 16-bit multiply
      subtract instructions supported
   • Built-in FPU: 32-bit single-precision floating point (compliant to
      IEEE754)
   • Divider (fastest instruction execution takes two CPU clock cycles)
   • Fast interrupt
   • CISC Harvard architecture with 5-stage pipeline
   • Variable-length instructions, ultra-compact code
   • On-chip debugging circuit
   • Memory protection unit (MPU) supported
◾ Low power design and architecture
   • Operation from a single 1.8-V to 5.5-V supply
   • Three low power consumption modes
   • Low power timer (LPT) that operates during the software standby state
◾ On-chip flash memory for code
   • Read cycle of 31.25 ns in 32-MHz operation
   • No waiting time when the CPU is reading at full speed
   • 128-Kbyte to 256-Kbyte capacities
   • On-board or off-board user programming
   • Programmable at 1.8 V
   • For instructions and operands
◾ On-chip data flash memory
   • 8 Kbytes (1,000,000 program/erase cycles (typ.))
   • BGO (Background Operation)
◾ On-chip SRAM, no wait states
   • 16- to 32-Kbyte size capacities
◾ Data transfer functions
   • DMAC: Incorporates four channels
   • DTC: Four transfer modes

APPLICATIONs
• General industrial and consumer equipment