[Jiangsu Haoheng Co., Ltd.]

Overview
CH424 is a FIFO memory chip with a capacity of 4K bytes. CH424 has two 8-bit passive parallel ports of input W and output R,
CH424 is connected to the system bus of microcontroller/DSP/MCU/MPU and other controllers through 8-bit data lines and control lines such as read, write, chip select, etc.
It is suitable for connecting single-chip microcomputer and single-chip microcomputer, single-chip microcomputer and DSP/MCU, etc. The figure below is its general application block diagram.

FEATUREs
● 4K x 8-bit FIFO.
● 8-bit parallel interface:
   W terminal/entry: 8-bit bidirectional tri-state data bus (WD7~WD0), chip select (W_CS), write (W_WR), read (W_RD);
   R terminal/exit: 8-bit tri-state data bus (RD7~RD0), chip select (R_CS), read (R_RD), address (R_A0).
● You can query the number of bytes in the used space and remaining space of the FIFO at any time, which is convenient for reading and writing in blocks.
● Provide FIFO full status line FULL and FIFO empty status line EMPT, active low.
● Support 5V power supply voltage, 3.3V power supply voltage and 3V power supply voltage.
● It adopts QFP-44 lead-free package and is RoHS compliant.