Dual CMOS/TTL to Differential PECL Translator

DESCRIPTION
The AZ100ELT22 is a dual CMOS/TTL to differential PECL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline packaging and the low skew, dual gate design of the AZ100ELT22 makes it ideal for applications that require the translation of a clock and a data signal.
The AZ100ELT22 is a direct replacement for the ON Semi MC100ELT22, MC100LVELT22 and Micrel SY89322V

FEATURES
• 0.5ns typical propagation delay
• <100ps typical output to output skew
• Differential PECL outputs
• Flow through pinouts

APPLICATIONS
• LVCMOS/LVTTL to LVPECL translations
• CMOS/TTL to PECL translations