Functional description
The 7C33256PFD16A and AS7C33256PFD18A are high performance CMOS 4 Mbit synchronous Static Random Access Memory (SRAM) devices organized as 262,144 words × 16 or 18 bits and incorporate a pipeline for highest frequency on any given technology.

FEATUREs
• Organization: 262,144 words × 16 or 18 bits
• Fast clock speeds to 200 MHz in LVTTL/LVCMOS
• Fast clock to data access: 3.0/3.1/3.5/4.0/5.0 ns
• Fast OE access time: 3.0/3.1/3.5/4.0/5.0 ns
• Fully synchronous register-to-register operation
• “Flow-through” mode
• Dual-cycle deselect
   - Single-cycle deselect also available (AS7C33256PFS16A/AS7C33256PFS18A)
• Pentium®1 compatible architecture and timing
• Asynchronous output enable control
• Economical 100-pin TQFP package
• Byte write enables
• Multiple chip enables for easy expansion
• 3.3V core power supply
• 2.5V or 3.3V I/O operation with separate VDDQ
• 30 mW typical standby power in power down mode
• NTD™<Superscript>1 pipeline architecture available
• (AS7C33256NTD16A/AS7C33256NTD18A)