
STMicroelectronics
DESCRIPTION
The 74V1G02 is an advanced high-speed CMOS SINGLE 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output.
Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.
■ HIGH SPEED: tPD = 3.6 ns (TYP.) at VCC = 5V
■ LOW POWER DISSIPATION: ICC =1 µA (MAX.) at TA = 25 °C
■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.)
■ POWERDOWN PROTECTIONON INPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN)
■ BALANCEDPROPAGATIONDELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGERANGE: VCC (OPR)= 2V to 5.5V
■ IMPROVED LATCH-UP IMMUNITY