General description
The 74AHC138; 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.
   
Features and benefits
■ Balanced propagation delays
■ All inputs have Schmitt-trigger action
■ Demultiplexing capability
■ Multiple input enable for easy expansion
■ Ideal for memory chip select decoding
■ Inputs accepts voltages higher than VCC
■ For 74AHC138 only: operates with CMOS input levels
■ For 74AHCT138 only: operates with TTL input levels
■ ESD protection:
    ◆ HBM JESD22-A114E exceeds 2000 V
    ◆ MM JESD22-A115-A exceeds 200 V
    ◆ CDM JESD22-C101C exceeds 1000 V
■ Multiple package options
■ Specified from -40°C to +85°C and from -40°C to +125°C