
MC74HC158A
tr
Input Aor B
tPHL
Output Y
90%
50%
10%
90%
50%
10%
tTHL
Figure 1.
SWITCHING WAVEFORMS
tf
VCC
GND
tPLH
tTLH
tr
Select
tPHL
Output Y
90%
50%
10%
90%
50%
10%
tTHL
tf
VCC
GND
tPLH
tTLH
Figure 2. Y versus Select, Inverted
tr
Output Enable
tPLH
Output Y
90%
50%
10%
90%
50%
10%
tTLH
Figure 3.
tf
VCC
GND
tPHL
tTHL
DEVICE
UNDER
TEST
TEST
POINT
OUTPUT
CL*
*Includes all probe and jig capacitance
Figure 4. Test Circuit
MOTOROLA
3–4
High–Speed CMOS Logic Data
DL129 — Rev 6