A6800SLTR-T Просмотр технического описания (PDF) - Allegro MicroSystems
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A6800SLTR-T Datasheet PDF : 11 Pages
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A6800 and
A6801
DABiC-5 Latched Sink Drivers
Description (continued)
The A6800SA is furnished in a 14-pin DIP with 7.62 mm
(0.300 in.) row centers, the A6800SL and A6801SLW in surface-
mountable SOICs; and the A6801SEP in a 28-lead PLCC. These
devices are lead (Pb) free, with 100% matte tin plated leadframes.
Applications include:
▪ Relays
▪ Lamps
▪ Solenoids
▪ Small DC motors
Selection Guide
Part Number
Package
Packing
A6800SA-T*
14-pin DIP
25 per tube
A6800SLTR-T
14-pin SOIC
2500 per reel
A6801SEPTR-T
28-pin PLCC
800 per reel
A6801SLWTR-T
24-pin SOIC
1000 per reel
*Variant is in production but has been determined to be NOT FOR NEW DESIGN. This classification indicates that
sale of the variant is currently restricted to existing customer applications. The variant should not be purchased for
new design applications because obsolescence in the near future is probable. Samples are no longer available.
Status change: May 4, 2009.
Absolute Maximum Ratings*
Characteristic
Symbol
Notes
Rating
Output Voltage
VCE
50
Supply Voltage
VDD
7
Input Voltage Range
VIN
–0.3 to VDD + 0.3
Continuous Collector Current
IC
600
Operating Ambient Temperature
TA
Range S
–20 to 85
Maximum Junction Temperature
TJ(max)
150
Storage Temperature
Tstg
–55 to 150
*Caution: CMOS devices have input-static protection, but are susceptible to damage when exposed to
extremely high static-electrical charges.
Units
V
V
V
mA
ºC
ºC
ºC
Allegro MicroSystems, Inc.
2
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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