ISL97671AIRZ-TK Просмотр технического описания (PDF) - Renesas Electronics

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ISL97671AIRZ-TK

6-Channel SMBus/I2C or PWM Dimming LED Driver with Phase Shift Control

Renesas Electronics 

ISL97671A

Ordering Information

PART NUMBER

(Notes 1, 2, 3)

PART

MARKING

PACKAGE

(RoHS

COMPLIANT)

PKG.

DWG. #

ISL97671AIRZ

671A

20 Ld 3x4 QFN L20.3x4

ISL97671AIRZ-EVALZ Evaluation Board

NOTES:

1. Add -T” suffix for 6k unit or “-TK” suffix for 1k unit tape and reel

options. Please refer to TB347 for details on reel specifications.

2. These Intersil Pb-free plastic packaged products employ special

Pb-free material sets, molding compounds/die attach materials, and

100% matte tin plate plus anneal (e3 termination finish, which is

RoHS compliant and compatible with both SnPb and Pb-free

soldering operations). Intersil Pb-free products are MSL classified at

Pb-free peak reflow temperatures that meet or exceed the Pb-free

requirements of IPC/JEDEC J STD-020.

3. For Moisture Sensitivity Level (MSL), refer to the ISL97671A device

information page. For more information about MSL, refer to TB363.

Pin Configuration

ISL97671A

(20 LD QFN)

TOP VIEW

20 19 18 17

FAULT 1

16 OVP

VIN 2

15 CH5

EN 3

VDC 4

EPAD

14 CH4

13 CH3

PWM 5

12 CH2

SMBDAT/SDA 6

11 CH1

7 8 9 10

Pin Descriptions (I = Input, O = Output, S = Supply)

PIN NAME

FAULT

VIN

EN

VDC

PWM

SMBDAT/SDA

SMBCLK/SCL

FPWM

AGND

CH0, CH1

CH2, CH3

CH4, CH5

OVP

RSET

COMP

PGND

LX

EPAD

PIN # TYPE

DESCRIPTION

1

O Fault disconnect switch gate control.

2

S Input voltage for the device and LED power.

3

I Enable input. The device needs 4ms for the initial power-up enable. It will be disabled if it is not biased for longer

than 30.5ms.

4

S Internal LDO output. Connect a decoupling capacitor to ground.

5

I PWM brightness control pin or DPST control input.

6

I/O SMBus/I2C serial data input and output. When Pins 6 and 7 are grounded or in logic 0’s for longer than 60ms, the

drivers will be controlled by the external PWM signal.

7

I SMBus/I2C serial clock input. When Pins 6 and 7 are grounded or in logic 0’s for longer than 60ms, the drivers will

be controlled by external PWM signal.

8

I Sets the PWM dimming frequency by connecting a resistor between this pin and ground. When FPWM is tied to VDC

and SMBCLK/SMBDAT is tied to ground, the device will be in Direct PWM Dimming where the output follows the

input frequency and duty cycle without any digitization.

9

S Analog ground for precision circuits.

10, 11,

12, 13,

14, 15

I Current source and channel monitoring input for Channels 0-5.

16

I Overvoltage protection input.

17

I Resistor connection for setting LED current, (see Equation 1 to calculate the ILED(peak)).

18

O Boost compensation pin.

19

S Power ground.

20

O Boost switch node.

No electrical connection, but should be used to connect PGND and AGND. For example, use the top plane as PGND

and the bottom plane as AGND with vias on EPAD to allow heat dissipation and minimum noise coupling from PGND

to AGND operation.

FN7709 Rev.4.00

Sep 14, 2017

Page 4 of 28

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