MAX1002CAX Просмотр технического описания (PDF) - Maxim Integrated

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MAX1002CAX

Low-Power, 60Msps, Dual, 6-Bit ADC

Maxim Integrated 

Low-Power, 60Msps, Dual, 6-Bit ADC

__________Applications Information

Layout, Grounding, and Bypassing

The MAX1002 is designed with separate analog and

digital power-supply and ground connections to isolate

high-current digital noise spikes from the more sensi-

tive analog circuitry. The high-current digital output

ground (OGND) and analog ground (GND) should be

at the same DC level, connected at only one location

on the board. This provides best noise immunity and

improved conversion accuracy. Use of separate

ground planes is strongly recommended.

The entire board requires good DC bypassing for both

analog and digital supplies. Place the bypass capaci-

tors close to where the power is routed onto the board,

i.e., close to the connector. 10µF electrolytic capacitors

with low ESR-ratings are recommended. For best effec-

tive bits performance, minimize capacitive loading at

the digital outputs. Keep the digital output traces as

short as possible.

The MAX1002 can operate with one +5V supply. For

optimum performance, separate +5V ±5% supplies and

bypassing are recommended. Bypass each of the VCC

supply pins to its respective GND with high-

quality ceramic capacitors located as close to the

package as possible (Table 2). Consult the evaluation

kit for a suggested layout and bypassing scheme.

Table 2. Bypassing

SUPPLY

FUNCTION

Analog Inputs

Oscillator/Clock

Converter

Digital Q Output

Digital I Output

Buffer

VCC /

VCCO

6

8

13

26

28

36

BYPASS TO

GND/OGND

7

11

12

27

27

19

CAPACITOR

VALUE

0.01µF

0.01µF

0.01µF

47pF

47pF

0.01µF

_____________Dynamic Performance

Signal-to-noise plus distortion (SINAD) is the ratio of the

fundamental input frequency’s RMS amplitude to all

other ADC output signals. The output spectrum is limit-

ed to frequencies above DC and below one-half the

ADC sample rate.

The theoretical minimum A/D noise is caused by quan-

tization error, and results directly from the ADC’s reso-

lution: SNR = (6.02N + 1.76)dB, where N is the number

of bits of resolution. Therefore, a perfect 6-bit ADC can

do no better than 38dB.

The FFT Plot (see Typical Operating Characteristics)

shows the result of sampling a pure 20MHz sinusoid at

a 60MHz clock rate. This FFT plot of the output shows

the output level in various spectral bands. The plot has

been averaged to reduce the quantization noise floor

and reveal the low-amplitude spurs. This emphasizes

the excellent spurious-free dynamic range of the

MAX1002.

The effective resolution (or ENOB) the ADC provides

can be measured by transposing the equation that con-

verts resolution to SNR: N = (SINAD - 1.76) / 6.02 (see

Typical Operating Characteristics).

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