MH64D72KLG-10 Просмотр технического описания (PDF) - MITSUBISHI ELECTRIC

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MH64D72KLG-10

4,831,838,208-BIT (67,108,864-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module

MITSUBISHI ELECTRIC  

Preliminary Spec.

Some contents are subject to change without notice.

MITSUBISHI LSIs

MH64D72KLG-75,-10

4,831,838,208-BIT (67,108,864-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module

ABSOLUTE M AXIMUM RATINGS

Symbol

Parameter

Conditions

Ratings

Unit

Vdd

Supply Voltage

with respect to Vss

-0.5 ~ 3.7

V

VddQ Supply Voltage for Output with respect to VssQ

-0.5 ~ 3.7

V

VI

Input Voltage

with respect to Vss -0.5 ~ Vdd+0.5

V

VO

Output Voltage

with respect to VssQ -0.5 ~ VddQ+0.5 V

IO

Output Current

50

mA

Pd

Power Dissipation

Ta = 25 C

20

W

Topr

Operating Temperature

0 ~ 70

C

T stg

Storage Temperature

-40 ~ 100

C

DC OPERATING CONDITIONS

(Ta=0 ~ 70OC , unless otherwise noted)

Symbol

Parameter

Min.

Limits

Typ.

Vdd/VddQ

Supply Voltage

2.3

2.5

Vref

Input Reference Voltage

1.15

1.25

VIH(DC)

High-Level Input Voltage

Vref + 0.18

VIL(DC)

Low-Level Input Voltage

-0.3

VIN(DC) Input Voltage Level, CK0 and /CK0

-0.3

VID(DC) Input Differential Voltage, CK0 and /CK0 0.36

VTT

I/O Termination Voltage

Vref - 0.04

Max.

Unit Notes

2.7

V

1.35

V5

VddQ+0.3 V

Vref - 0.18 V

VddQ + 0.3 V

VddQ + 0.6 V 7

Vref + 0.04 V 6

CAPACITANCE

(Ta=0 ~ 70OC, Vdd = VddQ = 2.5 ± 0.2V, Vss = VssQ = 0V, unless otherwise noted)

Symbol

Parameter

Test Condition

CI(A) Input Capacitance, address pin

CI(C) Input Capacitance, control pin

CI(K) Input Capacitance, CK0 pin

CI/O Input Capacitance, I/O pin

VI - 1.25V

f =100MHz

VI = 25mVrm

Limits(max.)

7.5

7.5

16.0

11.0

Unit Notes

pF 11

pF 11

pF 11

pF 11

MIT-DS-0389-1.1

MITSUBISHI ELECTRIC

20.Nov.2000

16

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