SM5006 series
5V operation: VDD = 4.5 to 5.5V, VSS = 0V, Ta = −40 to 85°C unless otherwise noted.
Parameter
Symbol
Condition
Rating
Unit
min typ max
HIGH-level output
voltage
VOH Q: Measurement cct 1, VDD = 4.5V, IOH = 16mA
4.0
4.2
–
V
LOW-level output voltage VOL Q: Measurement cct 2, VDD = 4.5V, IOL = 16mA
–
0.3
0.4
V
Output leakage current
IZ
Q: Measurement cct 2, INHN = LOW, VDD = 5.5V
VOH = VDD
VOL = VSS
–
–
10
µA
–
–
10
HIGH-level input voltage
VIH INHN
2.0
–
–
V
LOW-level input voltage
VIL INHN
–
–
0.8
V
f = 30MHz
SM5006ANAS
CF5006ANA
–
18
35
INHN = open,
Measurement cct 3,
load cct 1,
VDD = 4.5 to 5.5V,
CL = 50pF
f = 40MHz
f = 60MHz
f = 60MHz,
Ta = –20 to 80°C
f = 70MHz
SM5006ANBS
CF5006ANB
–
CF5006ANC
–
SM5006ANCS
–
CF5006AND
CF5006BNC
–
20
40
30
60
30
50
40
80
f = 70MHz,
Ta = –20 to 80°C
SM5006ANDS
SM5006BNCS
–
40
70
f = 60MHz, CL = 15pF,
Ta = –15 to 75°C
CF5006CNC
–
28
50
Current consumption
IDD
f = 60MHz, CL = 15pF,
Ta = 0 to 70°C
SM5006CNCS
–
f = 70MHz, CL = 15pF,
Ta = –15 to 75°C
CF5006CND
CF5006DNC
–
28
50
mA
35
65
f = 70MHz, CL = 15pF,
Ta = 0 to 70°C
SM5006CNDS
SM5006DNCS
–
INHN = open,
Measurement cct 3, f = 100MHz, CL = 15pF, CF5006CNE
load cct 1,
Ta = –20 to 80°C
CF5006DNE
–
VDD = 4.5 to 5.5V
f = 100MHz, CL = 15pF, SM5006CNES
Ta = 0 to 70°C
SM5006DNES
–
35
65
45
80
45
80
f = 100MHz, CL = 30pF CF5006ANE
–
f = 100MHz, CL = 15pF SM5006ANES
–
f = 107MHz, CL = 30pF, CF5006ANF
Ta = –20 to 80 °C
CF5006BNE
–
50
100
45
90
60
100
f = 107MHz, CL = 15pF, SM5006ANFS
Ta = –20 to 80°C
SM5006BNES
–
50
90
INHN pull-up resistance
RUP Measurement cct 4
SM5006ANAS, CF5006ANA
50
–
150 kΩ
6.97 8.2 9.43
SM5006ANBS, CF5006ANB
4.76 5.6 6.44
Feedback resistance
SM5006ANCS, CF5006ANC
SM5006CNCS, CF5006CNC
Rf Measurement cct 5
SM5006ANDS, CF5006AND
SM5006ANES, CF5006ANE
SM5006ANFS, CF5006ANF
SM5006CNDS, CF5006CND
SM5006CNES, CF5006CNE
4.16 4.9 5.64
kΩ
2.21 2.6 2.99
Built-in resistance
Built-in capacitance
RG Design value, determined by the Rf value
RD Design value, determined by the Rf value
CG Design value. A monitor pattern on a wafer is tested.
CD Design value. A monitor pattern on a wafer is tested.
17
20
23
Ω
17
20
23
7.44
8
8.56
pF
14.88 16 17.12
SEIKO NPC CORPORATION —8