Philips Semiconductors
N-channel dual-gate PoLo MOS-FETs
Product specification
BF1201; BF1201R;
BF1201WR
handbook,6h0alfpage
IG1
(µA)
40
20
MCD943
VGG = 5 V
4.5 V
4V
3.5 V
3V
0
0
2
4
6
VG2-S (V)
VDS = 5 V; Tj = 25 °C.
RG1 = 62 kΩ (connected to VGG); see Fig.21.
Fig.13 Gate 1 current as a function of gate 2
voltage; typical values.
0
handgbaoionk, halfpage
reduction
(dB)
−10
MCD944
−20
−30
−40
−50
0
1
2
3
4
VAGC (V)
VDS = 5 V; VGG = 5 V; RG1 = 62 kΩ;
f = 50 MHz; Tamb = 25 °C.
Fig.14 Typical gain reduction as a function of the
AGC voltage; see Fig.21.
handboo1k,2h0alfpage
Vunw
(dBµV)
110
MCD945
handbook,2h0alfpage
ID
(mA)
16
MCD946
100
90
80
0
10
20
30
40
50
gain reduction (dB)
VDS = 5 V; VGG = 5 V; RG1 = 62 kΩ; f = 50 MHz;
funw = 60 MHz; Tamb = 25 °C.
Fig.15 Unwanted voltage for 1% cross-modulation
as a function of gain reduction; typical
values; see Fig.21.
12
8
4
0
0
10
20
30
40
50
gain reduction (dB)
VDS = 5 V; VGG = 5 V; RG1 = 62 kΩ;
f = 50 MHz; Tamb = 25 °C.
Fig.16 Drain current as a function of gain
reduction; typical values; see Fig.21.
2000 Mar 29
7