CY7C1019BV33 Просмотр технического описания (PDF) - Cypress Semiconductor

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производитель

CY7C1019BV33

128K x 8 Static RAM

Cypress Semiconductor 

CY7C1019BV33

CY7C1018BV33

Data Retention Characteristics Over the Operating Range (L Version Only)

Parameter

Description

VDR

ICCDR

tCDR[3]

tR

VCC for Data Retention

Data Retention Current

Chip Deselect to Data Retention Time

Operation Recovery Time

Conditions

No input may exceed VCC + 0.5V

VCC = VDR = 2.0V,

CE > VCC – 0.3V,

VIN > VCC – 0.3V or VIN < 0.3V

Data Retention Waveform

Min. Max. Unit

2.0

V

150 µA

0

ns

200

µs

DATA RETENTION MODE

VCC

3.0V

VDR > 2V

3.0V

tCDR

tR

CE

Switching Waveforms

Read Cycle No. 1[9, 10]

tRC

ADDRESS

DATA OUT

tAA

tOHA

PREVIOUS DATA VALID

DATA VALID

Read Cycle No. 2 (OE Controlled)[10, 11]

ADDRESS

CE

OE

DATA OUT

VCC

SUPPLY

CURRENT

tRC

tACE

tDOE

tLZOE

HIGH IMPEDANCE

tLZCE

tPU

50%

Notes:

9. Device is continuously selected. OE, CE = VIL.

10. WE is HIGH for read cycle.

11. Address valid prior to or coincident with CE transition LOW.

DATA VALID

tHZOE

tHZCE

HIGH

IMPEDANCE

tPD

ICC

50%

ISB

4

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