PI74VCX16374
16-Bit D-Type Flip-Flop
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Test Circuits and Switching Waveforms
Switch Position
Parameter Measurement Information (VDD = 1.8V - 3.6V)
Test
S1
From Output
Under Test
30pF
CL
(See Note A)
R1
500Ω
RL
500Ω
2 x VDD
Open
GND
tPD
tPLZ/tPZL
tPHZ/tPZH
Pulse Width
Open
2 x VDD
GND
Low-High-Low
Pulse
Setup, Hold, and Release Timing
Data
Input
Timing
Input
tSU
tH
VDD
VDD/2
0V
VDD
VDD/2
0V
Notes:
A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that
the output is LOW except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is HIGH except when disabled by the output control.
• All input pulses are supplied by generators having the follow
ing characteristics: PRR ≤ 10 MHz, ZO = 50Ω, tR ≤ 2ns,
tF ≤ 2ns, measured from 10% to 90%, unless otherwise
specified.
• The outputs are measured one at a time with one transition per
measurement.
High-Low-High
Pulse
Propagaton Delay
Input
tPLH
Output
tPHL
Opposite Phase
Input Transition
Enable Disable Timing
Output
Control
(Active LOW)
tPZL
Output
Waveform 1
S1 at 2xVDD
(see Note B) tPZH
Output
Waveform 2
S1 at GND
(see Note B)
tW
tPLZ
VDD
VDD/2
tPHZ
VDD/2
VDD
VDD/2
0V
VDD
VDD/2
0V
VDD
VDD/2
tPHL
0V
VDD
VDD/2
tPLH
VOL
VDD
VDD/2
0V
VDD
VDD/2
0V
VDD
+0.15V
VOL
-0.15V VOH
0V
06-0204
7
PS8327B 10/27/06