LTC1417IGN(RevA) Просмотр технического описания (PDF) - Linear Technology

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производитель

LTC1417IGN
(Rev.:RevA)

Low Power 14-Bit, 400ksps Sampling ADC Converter with Serial I/O

Linear Technology 

LTC1417

TYPICAL APPLICATIONS

BCLR

*

TRFLP1 LDAA

STAA

*

WAIT1 LDAA

*

BPL

*

*

LDAA

*

STAA

INX

CPX

BNE

*

BSET

*

LDD

*

LSRD

LSRD

*

STD

PULA

PULY

PULX

RTS

PORTD,Y %00100000 This sets the SS* output bit to a logic

low, selecting the LTC1417

#$0 Load accumulator A with a null byte for SPI transfer

SPDR This writes the byte into the SPI data register and

starts the transfer

SPSR This loop waits for the SPI to complete a serial

transfer/exchange by reading the SPI Status Register

WAIT1 The SPIF (SPI transfer complete flag) bit is the SPSR’s

MSB and is set to one at the end of an SPI transfer. The

branch will occur while SPIF is a zero.

SPDR Load accumulator A with the current byte of LTC1417 data

that was just received

0,X Transfer the LTC1417’s data to memory

Increment the pointer

#DIN2+1Has the last byte been transferred/exchanged?

TRFLP1 If the last byte has not been reached, then proceed to

the next byte for transfer/exchage

PORTD,Y %00100000 This sets the SS* output bit to a logic

high, de-selecting the LTC1417

DIN1 Load the contents of DIN1 and DIN2 into the double

accumulator D

DIN1

Two logical shifts to right justify the 14-bit

conversion results

Return right justified data to memory

Restore the A register

Restore the Y register

Restore the X register

CONVST

BUSY

RD

SCLK

DOUT

CH0 DATA

CH1 DATA

CH2 DATA

CH5

CH3 DATA

MUX

DATA

CH0

CH1

CH2

CH3

1417 F24

Figure 24. Using the Sample Program In Listing 2, the LTC1417, Combined with the DG408 8-Channel MUX,

Has No Latency Between the Selected Input Voltage and Its Conversion Data as Shown In the Timing Relationship Above

30

sn1417 1417fas

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