UPD720101F1-EA8 Просмотр технического описания (PDF) - NEC => Renesas Technology
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UPD720101F1-EA8 Datasheet PDF : 36 Pages
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USB interface block
Parameter
Symbol
Low-speed Source Electrical Characteristics
Rise time (10 to 90%)
tLR
Fall time (90 to 10%)
tLF
Differential rise and fall time matching
tLRFM
Low-speed data rate
tLDRATHS
Source jitter total (including frequency
tolerance):
To next transition
tDDJ1
For paired transitions
tDDJ2
Source jitter for differential transition to
SE0 transition
tLDEOP
Receiver jitter:
To next transition
tUJR1
For paired transitions
tUJR2
Source SE0 interval of EOP
tLEOPT
Receiver SE0 interval of EOP
tLEOPR
Width of SE0 interval during differential
tFST
transition
Full-speed Source Electrical Characteristics
Rise time (10 to 90%)
tFR
Fall time (90 to 10%)
tFF
Differential rise and fall time matching
Full-speed data rate
Frame interval
Consecutive frame interval jitter
Source jitter total (including frequency
tolerance):
To next transition
For paired transitions
Source jitter for differential transition to
SE0 transition
Receiver jitter:
To next transition
For paired transitions
Source SE0 interval of EOP
Receiver SE0 interval of EOP
Width of SE0 interval during differential
transition
tFRFM
tFDRATHS
tFRAME
tRFI
tDJ1
tDJ2
tFDEOP
tJR1
tJR2
tFEOPT
tFEOPR
tFST
Conditions
CL = 200 to 600 pF,
RS = 36 Ω
CL = 200 to 600 pF,
RS = 36 Ω
(tLR/tLF)
Average bit rate
CL = 50 pF,
RS = 36 Ω
CL = 50 pF,
RS = 36 Ω
(tFR/tFF)
Average bit rate
No clock adjustment
µPD720101
(1/2)
Min.
Max.
Unit
75
75
80
1.49925
300
ns
300
ns
125
1.50075
%
Mbps
−25
+25
ns
−14
+14
ns
−40
+100
ns
−152
−200
1.25
670
+152
ns
+200
ns
1.50
µs
ns
210
ns
4
4
90
11.9940
0.9995
20
ns
20
ns
111.11
12.0060
1.0005
42
%
Mbps
ms
ns
−3.5
+3.5
ns
−4.0
+4.0
ns
−2
+5
ns
−18.5
−9
160
82
+18.5
ns
+9
ns
175
ns
ns
14
ns
Data Sheet S16265EJ4V0DS
23
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