ADE7854 Просмотр технического описания (PDF) - Analog Devices
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ADE7854 Datasheet PDF : 100 Pages
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Data Sheet
Table 4. SPI Interface Timing Parameters
Parameter
SS to SCLK Edge
SCLK Period
SCLK Low Pulse Width
SCLK High Pulse Width
Data Output Valid After SCLK Edge
Data Input Setup Time Before SCLK Edge
Data Input Hold Time After SCLK Edge
Data Output Fall Time
Data Output Rise Time
SCLK Rise Time
SCLK Fall Time
MISO Disable After SS Rising Edge
SS High After SCLK Edge
1 Guaranteed by design.
ADE7854/ADE7858/ADE7868/ADE7878
Symbol
tSS
tSL
tSH
tDAV
tDSU
tDHD
tDF
tDR
tSR
tSF
tDIS
tSFS
Min
Max
Unit
50
ns
0.4
40001
μs
175
ns
175
ns
100
ns
100
ns
5
ns
20
ns
20
ns
20
ns
20
ns
200
ns
0
ns
SS
tSS
tSFS
SCLK
tSL
tDAV
tSH
tSF
tSR
tDIS
MISO
MOSI
MSB
INTERMEDIATE BITS
LSB
tDF
INTERMEDIATE BITS
tDSU
MSB IN
tDHD
Figure 6. SPI Interface Timing
tDR
LSB IN
Rev. H | Page 13 of 100
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