NXP Semiconductors
5. Functional diagram
A2
6
3 VSS1
5
VDD1
HEF4521B
24-stage frequency divider and oscillator
4
2
9
Y2 MR
A1
CP
STAGES 1 to 8
CD
Q8
CP
STAGES 9 to 16
CD
Q16
CP
STAGES 17 to 24
CD
Fig 1. Functional diagram
VDD1
Q24 Q18 Q19 Q20 Q21 Q22 Q23
1 10 11 12 13 14 15
Y1
7
001aae708
VDD
A2
to FFs
to logic
VSS1
Y2
Fig 2. Schematic diagram of clock input circuitry
VSS
001aae711
HEF4521B_5
Product data sheet
Rev. 05 — 5 November 2009
© NXP B.V. 2009. All rights reserved.
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