74HCT166(2015) Просмотр технического описания (PDF) - NXP Semiconductors.

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производитель

74HCT166
(Rev.:2015)

8-bit parallel-in/serial out shift register

NXP Semiconductors. 

Nexperia

74HC166; 74HCT166

8-bit parallel-in/serial out shift register

Table 7. Dynamic characteristics …continued

GND (ground = 0 V); tr = tf = 6 ns: CL = 50 pF unless otherwise specified; for test circuit, see Figure 10

Symbol Parameter Conditions

25 C

40 C to +85 C 40 C to +125 C Unit

Min Typ Max Min Max

Min

Max

fmax

maximum CP input; see Figure 7

frequency

VCC = 4.5 V

25 45 -

20

-

17

- MHz

VCC = 5.0 V; CL = 15 pF

- 50 -

-

-

-

- MHz

CPD

power

per package;

dissipation VI = GND to VCC

capacitance

[3] - 41 -

-

-

-

- pF

[1] tpd is the same as tPHL and tPLH.

[2] tt is the same as tTHL and tTLH.

[3] CPD is used to determine the dynamic power dissipation (PD in W).

PD = CPD  VCC2  fi + (CL  VCC2  fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

 (CL  VCC2  fo) = sum of outputs;

CL = output load capacitance in pF;

VCC = supply voltage in V.

11. Waveforms

9,

&3LQSXW

*1'

92+

4RXWSXW

92/

IPD[

90

W:

W3+/



90



W7+/

W3/+





W7/+

DDD

Fig 7.

Measurement points are given in Table 8.

VOL and VOH are typical voltage output levels that occur with the output load.

Clock (CP) to output (Q7) propagation delays, pulse width, output transition times and maximum

frequency

74HC_HCT166

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 4 — 28 December 2015

© Nexperia B.V. 2017. All rights reserved

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