ADUM2251ARWZ Просмотр технического описания (PDF) - Analog Devices
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ADUM2251ARWZ Datasheet PDF : 16 Pages
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ADuM2250/ADuM2251
Data Sheet
AC Specifications
All voltages are relative to their respective grounds. All minimum/maximum specifications apply over the entire recommended operating
range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = 5 V, and VDD2 = 5 V, unless otherwise noted. See Figure 5
for a timing test diagram.
Table 2.
Parameter
MAXIMUM FREQUENCY
OUTPUT FALL TIME
5 V Operation
Side 1 Output (0.9 VDD1 to 0.9 V)
Side 2 Output (0.9 VDD2 to 0.1 VDD2)
3 V Operation
Side 1 Output (0.9 VDD1 to 0.9 V)
Side 2 Output (0.9 VDD2 to 0.1 VDD2)
PROPAGATION DELAY
5 V Operation
Side 1 to Side 2, Rising Edge1
Side 1 to Side 2, Falling Edge2
Side 2 to Side 1, Rising Edge3
Side 2 to Side 1, Falling Edge4
3 V Operation
Side 1 to Side 2, Rising Edge1
Side 1 to Side 2, Falling Edge2
Side 2 to Side 1, Rising Edge3
Side 2 to Side 1, Falling Edge4
PULSE WIDTH DISTORTION
5 V Operation
Side 1 to Side 2, |tPLH12 − tPHL12|
Side 2 to Side 1, |tPLH21 − tPHL21|
3 V Operation
Side 1 to Side 2, |tPLH12 − tPHL12|
Side 2 to Side 1, |tPLH21 − tPHL21|
COMMON-MODE TRANSIENT IMMUNITY5
Symbol
Min Typ Max Unit
1000
kHz
Test Conditions/Comments
4.5 V ≤ VDD1, VDD2 ≤ 5.5 V, CL1 = 40 pF,
R1 = 1.6 kΩ, CL2 = 400 pF, R2 = 180 Ω
tf1
13 26 120 ns
tf2
32 52 120 ns
3.0 V ≤ VDD1, VDD2 ≤ 3.6 V, CL1 = 40 pF,
R1 = 1.0 kΩ, CL2 = 400 pF, R2 = 120 Ω
tf1
13 32 120 ns
tf2
32 61 120 ns
tPLH12
tPHL12
tPLH21
tPHL21
tPLH12
tPHL12
tPLH21
tPHL21
95 130 ns
162 275 ns
31 70 ns
85 155 ns
82 125 ns
196 340 ns
32 75 ns
110 210 ns
4.5 V ≤ VDD1, VDD2 ≤ 5.5 V, CL1 = CL2 = 0 pF,
R1 = 1.6 kΩ, R2 = 180 Ω
3.0 V ≤ VDD1, VDD2 ≤ 3.6 V, CL1 = CL2 = 0 pF,
R1 = 1.0 kΩ, R2 = 120 Ω
PWD12
PWD21
PWD12
PWD21
|CMH|, |CML| 25
67 145
54 85
114 215
77 135
35
ns
ns
ns
ns
kV/µs
4.5 V ≤ VDD1, VDD2 ≤ 5.5 V, CL1 = CL2 = 0 pF,
R1 = 1.6 kΩ, R2 = 180 Ω
3.0 V ≤ VDD1, VDD2 ≤ 3.6 V, CL1 = CL2 = 0 pF,
R1 = 1.0 kΩ, R2 = 120 Ω
1 tPLH12 propagation delay is measured from the Side 1 input logic threshold to an output value of 0.7 VDD2.
2 tPHL12 propagation delay is measured from the Side 1 input logic threshold to an output value of 0.4 V.
3 tPLH21 propagation delay is measured from the Side 2 input logic threshold to an output value of 0.7 VDD1.
4 tPHL21 propagation delay is measured from the Side 2 input logic threshold to an output value of 0.9 V.
5 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
Rev. D | Page 4 of 16
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