Data Sheet
ECG CHANNEL
The ECG channel consists of a programmable gain, low noise,
differential preamplifier; a fixed gain anti-aliasing filter; buffers;
and an ADC (see Figure 56). Each electrode input is routed to
its PGA noninverting input. Internal switches allow the PGA’s
inverting inputs to be connected to other electrodes and/or
the Wilson central terminal to provide differential analog
processing (analog lead mode), to a computed average of some
or all electrodes, or the internal 1.3 V common-mode reference
(VCM_REF). The latter two modes support digital lead mode
(leads computed on-chip) and electrode mode (leads calculated
off-chip). In all cases, the internal reference level is removed
from the final lead data.
ADAS1000/ADAS1000-1/ADAS1000-2
The ADAS1000/ADAS1000-1/ADAS1000-2 implementation
uses a dc-coupled approach, which requires that the front end
be biased to operate within the limited dynamic range imposed
by the relatively low supply voltage. The right leg drive loop
performs this function by forcing the electrical average of all
selected electrodes to the internal 1.3 V level, VCM_REF,
maximizing each channel’s available signal range.
All ECG channel amplifiers use chopping to minimize 1/f noise
contributions in the ECG band. The chopping frequency of
~250 kHz is well above the bandwidth of any signals of interest.
The 2-pole anti-aliasing filter has ~65 kHz bandwidth to support
digital pace detection while still providing greater than 80 dB of
attenuation at the ADC’s sample rate. The ADC itself is a 14-bit,
2 MHz SAR converter; 1024 × oversampling helps achieve the
required system performance. The ADC’s full-scale input range
is 2 × VREF, or 3.6 V, although the analog portion of the ECG
channel limits the useful signal swing to about 2.8 V.
ADAS1000
TO COMMON-MODE AMPLIFIER
FOR DRIVEN LEG AND
SHIELD DRIVER
ELECTRODE
PATIENT
CABLE
EXTERNAL
RFI AND DEFIB
PROTECTION
AVDD
PREAMP
G = 1, 1.5, 2, 3
+
DIFF AMP
BUFFER
FILTER G = 1.4
–
fS VREF
ADC
14
ELECTRODE
EXTERNAL
RFI AND DEFIB
PROTECTION
ELECTRODE
VCM
SHIELD DRIVER
Figure 56. Simplified Schematic of a Single ECG Channel
Rev. A | Page 29 of 80