HEF4081B-Q100 Просмотр технического описания (PDF) - NXP Semiconductors.
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HEF4081B-Q100 Datasheet PDF : 11 Pages
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4. Functional diagram
HEF4081B-Q100
Quad 2-input AND gate
1 1A
2 1B
5 2A
6 2B
8 3A
9 3B
12 4A
13 4B
1Y 3
2Y 4
3Y 10
4Y 11
001aai139
Fig 1. Functional diagram
5. Pinning information
5.1 Pinning
nA
nB
nY
001aag180
Fig 2. Logic diagram (one gate)
Fig 3. Pin configuration
+()%4
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%
<
<
$
%
966
9''
%
$
<
<
%
$
DDD
5.2 Pin description
Table 2.
Symbol
1A to 4A
1B to 4B
1Y to 4Y
VSS
VDD
Pin description
Pin
1, 5, 8, 12
2, 6, 9, 13
3, 4, 10, 11
7
14
Description
input
input
output
ground (0 V)
supply voltage
HEF4081B_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 November 2013
© Nexperia B.V. 2017. All rights reserved
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