STL12N65M5
3
Test circuits
Test circuits
Figure 15. Switching times test circuit for
resistive load
Figure 16. Gate charge test circuit
VDD
VD
VGS
RG
PW
RL
2200
μF
D.U.T.
3.3
μF VDD
12V
47kΩ
1kΩ
100nF
Vi=20V=VGMAX
2200
μF
IG=CONST
2.7kΩ
100Ω
D.U.T.
VG
47kΩ
PW
AM01468v1
1kΩ
AM01469v1
Figure 17. Test circuit for inductive load
switching and diode recovery times
Figure 18. Unclamped inductive load test circuit
G
25 Ω
A
D
D.U.T.
S
B
AA
FAST
DIODE
L=100μH
B
3.3
B
μF
D
G
RG
S
1000
μF
VDD
Vi
L
VD
2200
3.3
μF
μF
VDD
ID
D.U.T.
AM01470v1
Figure 19. Unclamped inductive waveform
V(BR)DSS
VD
Pw
AM01471v1
Figure 20. Switching time waveform
Concept waveform for Inductive Load Turn-off
Id
90%Vds
90%Id
VDD
IDM
ID
VDD
Vgs
90%Vgs on
10%Vds
Vds
Vgs(I(t))
AM01472v1
Tdelay-off
Trise
Tfall
Tcross -over
10%Id
AM05540v2
DocID17450 Rev 4
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