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MAX8771

Dual-Phase, QuickPWM Controller for IMVP-6+ CPU Core Power Supplies

Maxim Integrated 

CONFIDENTIAL INFORMATION – RESTRICTED TO INTEL® IMVP-6 LICENSEES

MAX8770/MAX8771/MAX8772 Dual-Phase, Quick-

PWM Controller for IMVP-6+ CPU Core Power Supplies

MAX8770/MAX8771/MAX8772

Detailed Description

Free-Running, Constant On-Time PWM

Controller with Input Feed-Forward

The Quick-PWM control architecture is a pseudo-fixed-

frequency, constant-on-time, current-mode regulator

with voltage feed-forward (Figure 2). This architecture

relies on the output filter capacitor’s ESR to act as the

current-sense resistor, so the output ripple voltage pro-

vides the PWM ramp signal. The control algorithm is sim-

ple: the high-side switch on-time is determined solely by

a one-shot whose period is inversely proportional to

input voltage, and directly proportional to output voltage

or the difference between the main and secondary

inductor currents (see the On-Time One-Shot section).

Another one-shot sets a minimum off-time. The on-time

one-shot triggers when the error comparator goes low,

the inductor current of the selected phase is below the

valley current-limit threshold, and the minimum off-time

one-shot times out. The controller maintains 180° out-of-

THRM

VRHOT

CSP2

CSN2

CSP1

CSN1

VCC

REF

GND

REF

(2.0V)

TIME

D0–D6

MAX8770

MAX8771

MAX8772

0.3 x VCC

22.5mV

22.5mV

DPRSLPVR

R-TO-I

CONVERTER

DPRSTP

DAC

MINIMUM

OFF-TIME

Q

TRIG

ONE-SHOT

SHDN

FAULT

REF

QQ

T

CSP1

CSN1

2.5mV

CCV

Gm(CCV)

FB

TARGET

- 300mV

GNDS

x2

Gm(FB)

CSP_

CSN_

PHASE CONTROL

BLANK

SECONDARY

PHASE DRIVERS

TRIG

Q

ONE-SHOT

PHASE 2

ON-TIME

PHASE 1

ON-TIME

ONE-SHOT

Q

TRIG

R

Q

S

BST2

DH2

LX2

DL2

PGND2

BLANK

CURRENT-

BALANCE-

FAULT

5ms

STARTUP

DELAY

PHASEGD

CCI

CSN2

Gm(CCI)

FB

Gm(CCI)

CSP2

CSP1

CSN1

TON

MAIN PHASE

BST1

DRIVERS

DH1

LX1

S

Q

R

VDD

DL1

TARGET

+ 200mV

5ms

STARTUP

DELAY

60µs

STARTUP

DELAY

PGND1

PWRGD

CLKEN

CSP1 - CSN1

CSN1 - GNDS

CSP2 - CSN2

POWER

MONITOR

POUT

Figure 2. Functional Block Diagram

20 ______________________________________________________________________________________

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