P2V28S40ATP-8 Просмотр технического описания (PDF) - Vanguard International Semiconductor

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P2V28S40ATP-8

128Mb SDRAM Specification

Vanguard International Semiconductor 

128Mb Synchronous DRAM

P2V28S20ATP-7,-75,-8 (4-BANK x 8,388,608-WORD x 4-BIT)

P2V28S30ATP-7,-75,-8 (4-BANK x 4,194,304-WORD x 8-BIT)

P2V28S40ATP-7,-75,-8 (4-BANK x 2,097,152-WORD x 16-BIT)

FUNCTION TRUTH TABLE (continued)

Current State /CS /RAS /CAS /WE Address

Command Action

WRITE

H X X XX

RECOVERING

L

H H HX

DESEL NOP

NOP NOP

L H H L BA

TBST ILLEGAL*2

L

H L X BA, CA, A10 READ / ILLEGAL*2

WRITE

L L H H BA, RA

ACT ILLEGAL*2

L L H L BA, A10

PRE / ILLEGAL*2

PREA

L L L HX

REFA ILLEGAL

L

L

L L Op-Code,

Mode-Add

MRS ILLEGAL

REFRESHING H X X X X

DESEL NOP (Idle after tRC)

L H H HX

NOP NOP (Idle after tRC)

L H H L BA

TBST ILLEGAL

L

H

L X BA, CA, A10 READ / ILLEGAL

WRITE

L L H H BA, RA

ACT ILLEGAL

L L H L BA, A10

PRE /

PREA

ILLEGAL

L L L HX

REFA ILLEGAL

L

L

L L Op-Code,

Mode-Add

MRS ILLEGAL

JULY.2000

Page-11

Rev.2.2

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