S1
1 OF 4
DECODER
S2
D3
PARALLEL ENTER
SHIFT RIGHT
DR
SHIFT LEFT
HOLD
MC10H141
LOGIC DIAGRAM
D2
D1
D0
DL
DQ
DQ
DQ
DQ
C
C
C
C
C
Q3
Q2
VCC1 = PIN 1
SCC2 = PIN 16
VEE = PIN 8
Q1
Q0
APPLICATION INFORMATION
The MC10H141 is a four−bit universal shift register
which performs shift left, or shift right, serial/parallel in, and
serial/parallel out operations with no external gating. Inputs
S1 and S2 control the four possible operations of the register
without external gating of the clock. The flip−flops shift
information on the positive edge of the clock. The four
operations are stop shift, shift left, shift right, and parallel
entry of data. The other six inputs are all data type inputs;
four for parallel entry data, and one for shifting in from the
left (DL) and one for shifting in from the right (DR).
ORDERING INFORMATION
Device
Package
Shipping†
MC10H141FN
PLLC−20
46 Units / Rail
MC10H141FNG
PLLC−20
(Pb−Free)
46 Units / Rail
MC10H141FNR2
PLLC−20
500 / Tape & Reel
MC10H141FNR2G
PLLC−20
(Pb−Free)
500 / Tape & Reel
MC10H141L
CDIP−16
25 Unit / Rail
MC10H141P
PDIP−16
25 Unit / Rail
MC10H141PG
PDIP−16
(Pb−Free)
25 Unit / Rail
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
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