ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404
ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY
All typical specifications are at TA = 25°C, VDD1 = VISO = 3.3 V, VSEL = GNDISO. Minimum/maximum specifications apply over the entire
recommended operation range which is 3.0 V ≤ VDD1, VSEL, VISO ≤ 3.6 V; and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching
specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 6. DC-to-DC Converter Static Specifications
Parameter
Symbol Min Typ
DC-TO-DC CONVERTER SUPPLY
Setpoint
VISO
3.0 3.3
Line Regulation
Load Regulation
Output Ripple
Output Noise
Switching Frequency
PW Modulation Frequency
Output Supply
Efficiency at IISO (MAX)
VISO (LINE)
VISO (LOAD)
VISO (RIP)
VISO (NOISE)
fOSC
fPWM
IISO (MAX)
60
1
1
50
130
180
625
33
IDD1, No VISO Load
IDD1 (Q)
14
IDD1, Full VISO Load
IDD1 (MAX)
175
Max
3.6
5
20
Unit
V
mV/V
%
mV p-p
mV p-p
MHz
kHz
mA
%
mA
mA
Test Conditions
IISO = 0 mA
IISO = 30 mA, VDD1 = 3.0 V to 3.6 V
IISO = 6 mA to 54 mA
20 MHz bandwidth, CBO = 0.1 μF||10 μF, IISO = 54 mA
CBO = 0.1 μF||10 μF, IISO = 54 mA
VISO > 3 V
IISO = 60 mA
Table 7. DC-to-DC Converter Dynamic Specifications
2 Mbps—A Grade, B Grade, C Grade
Parameter
Symbol Min
Typ Max
SUPPLY CURRENT
ADuM6400
IDD1
14
IISO (LOAD)
60
ADuM6401
IDD1
14
IISO (LOAD)
60
ADuM6402
IDD1
14
IISO (LOAD)
60
ADuM6403
IDD1
14
IISO (LOAD)
60
ADuM6404
IDD1
14
IISO (LOAD)
60
25 Mbps—C Grade
Min Typ Max
Unit Test Conditions
41
mA No VISO load
43
mA
44
mA No VISO load
42
mA
46
mA No VISO load
41
mA
47
mA No VISO load
39
mA
51
mA No VISO load
38
mA
Table 8. Switching Specifications
Parameter
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional1
Opposing Directional2
Symbol
tPHL, tPLH
PWD
PW
tPSK
tPSKCD
tPSKOD
A Grade
C Grade
Min Typ Max Min Typ Max Unit
1
60 100
40
1000
40
50
25
45 60
6
5
45
Mbps
ns
ns
ps/°C
ns
ns
50
6
ns
50
15 ns
Test Conditions
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
Within PWD limit
Between any two units
1 7Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the
isolation barrier.
2 Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the
isolation barrier.
Rev. 0 | Page 5 of 24