ADT7310TRZ-REEL Просмотр технического описания (PDF) - Analog Devices

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ADT7310TRZ-REEL

±0.5°C Accurate, 16-Bit Digital SPI Temperature Sensor

Analog Devices 

Data Sheet

ADT7310

THYST SETPOINT REGISTER

The THYST setpoint 8-bit register (Register Address 0x05) stores

the temperature hysteresis value for the THIGH, TLOW, and TCRIT

temperature limits. The temperature hysteresis value is stored in

straight binary format using four LSBs. Increments are possible

in steps of 1°C from 0°C to 15°C. The value in this register is

subtracted from the THIGH and TCRIT values and added to the

TLOW value to implement hysteresis.

The default setting for the THYST setpoint is 5°C.

THIGH SETPOINT REGISTER

The 16-bit THIGH setpoint register (Register Address 0x06) stores

the overtemperature limit value. An overtemperature event

occurs when the temperature value stored in the temperature

value register exceeds the value stored in this register. The INT pin

is activated if an overtemperature event occurs. The temperature

is stored in twos complement format with the most significant

bit being the temperature sign bit.

The default setting for the THIGH setpoint is 64°C.

TLOW SETPOINT REGISTER

The 16-bit TLOW setpoint register (Register Address 0x07) stores

the undertemperature limit value. An undertemperature event

occurs when the temperature value stored in the temperature

value register is less than the value stored in this register. The

INT pin is activated if an undertemperature event occurs. The

temperature is stored in twos complement format with the MSB

being the temperature sign bit.

The default setting for the TLOW setpoint is 10°C.

Table 12. THYST Setpoint Register (Register Address 0x05)

Bit

Default Value Type Name Description

[3:0]

0101

R/W THYST Hysteresis value, from 0°C to 15°C. Stored in straight binary format. The default setting is 5°C.

[7:4]

0000

R/W N/A Not used.

Table 13. THIGH Setpoint Register (Register Address 0x06)

Bit

Default Value Type Name Description

[15:0] 0x2000

R/W THIGH 16-bit overtemperature limit, stored in twos complement format.

Table 14. TLOW Setpoint Register (Register Address 0x07)

Bit

Default Value Type Name Description

[15:0] 0x0500

R/W TLOW 16-bit undertemperature limit, stored in twos complement format.

Rev. A | Page 17 of 24

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