ADG620BRMZ2 Просмотр технического описания (PDF) - Analog Devices

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производитель

ADG620BRMZ2

CMOS, ±5 V/+5 V, 4 Ω, Single SPDT Switches

Analog Devices 

ADG619/ADG620

TERMINOLOGY

IDD

Positive supply current.

ISS

Negative supply current.

RON

Ohmic resistance between D and S terminals.

ΔRON

On resistance match between any two channels.

RFLAT (ON)

Flatness is defined as the difference between the maximum and

minimum value of on resistance as measured over the specified

analog signal range.

IS (Off)

Source leakage current with the switch off.

ID, IS (On)

Channel leakage current with the switch on.

VD, VS

Analog voltage on Terminal D and Terminal S.

VINL

Maximum input voltage for Logic 0.

VINH

Minimum input voltage for Logic 1.

IINL, IINH

Input current of the digital input.

CS (Off)

Off switch source capacitance.

CD, CS (On)

On switch capacitance.

tON

Delay between applying the digital control input and the output

switching on.

tOFF

Delay between applying the digital control input and the output

switching off.

tMBB

On time is measured between the 80% points of both switches,

when switching from one address state to another.

tBBM

Off time or on time is measured between the 90% points of

both switches, when switching from one address state

to another.

Charge Injection

A measure of the glitch impulse transferred from the digital

input to the analog output during switching.

Crosstalk

A measure of unwanted signal coupled through from one

channel to another as a result of parasitic capacitance.

Off Isolation

A measure of unwanted signal coupling through an off switch.

Bandwidth

The frequency response of the on switch.

Insertion Loss

The loss due to the on resistance of the switch.

Rev. C | Page 10 of 16

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