NXP Semiconductors
74LVT16374A; 74LVTH16374A
3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
terminal 1
index area
D1
A32 A31 A30 A29 A28 A27
D4
A1
D5
B20 B19 B18
D8
A26
A2
B1
A3
B2
A4
B3
A5
B4
A6
B5
A7
B6
A8
B7
A9
A10
D6
74LVT16374A
74LVTH16374A
GND(1)
B8
B9
B10
A25
B17
A24
B16
A23
B15
A22
B14
A21
B13
A20
B12
A19
B11
A18
D7
A17
D2
A11 A12 A13 A14 A15 A16
D3
Transparent top view
001aak265
(1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input.
Fig 6. Pin configuration SOT1134-1 (HXQFN60U)
74LVT_LVTH16374A_7
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 07 — 22 March 2010
© NXP B.V. 2010. All rights reserved.
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