74LVT16374ADL Просмотр технического описания (PDF) - NXP Semiconductors.
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74LVT16374ADL Datasheet PDF : 19 Pages
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NXP Semiconductors
74LVT16374A; 74LVTH16374A
3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
VI
nOE input
GND
3.0 V
nYn output
VOL
VOH
nYn output
0V
VM
tPZL
VM
t PZH
VM
tPLZ
VX
t PHZ
VY
001aae464
Fig 8.
Measurements points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Enable and disable times
VI
nCP input
GND
VI
nDn input
GND
VM
t su
th
VM
t su
th
VOH
nQn output
VOL
VM
001aaa257
Fig 9.
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Remark: The shaded areas indicate when the input is permitted to change for predictable output performance.
Data set-up and hold times
74LVT_LVTH16374A_7
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 07 — 22 March 2010
© NXP B.V. 2010. All rights reserved.
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