PALCE16V8H-10P Просмотр технического описания (PDF) - Advanced Micro Devices

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производитель

PALCE16V8H-10P

EE CMOS 20-Pin Universal Programmable Array Logic

Advanced Micro Devices 

BLOCK DIAGRAM

I1 – I8

8

Programmable AND Array

32 x 64

AMD

CLK/I0

MACRO

MC0

MACRO

MC1

MACRO

MC2

MACRO

MC3

MACRO

MC4

MACRO

MC5

MACRO

MC6

MACRO

MC7

OE/I9

I/O0

I/O1

I/O2

I/O3

I/O4

I/O5

I/O6

I/O7

16493D-1

CONNECTION DIAGRAMS

Top View

DIP/SOIC

CLK/I0 1

I1 2

I2 3

I3 4

I4 5

I5 6

I6 7

I7 8

I8 9

GND 10

20 VCC

19 I/O7

18 I/O6

17 I/O5

16 I/O4

15 I/O3

14 I/O2

13 I/O1

12 I/O0

11 OE/I9

16493D-2

Note: Pin 1 is marked for orientation.

PIN DESIGNATIONS

CLK = Clock

GND = Ground

I

= Input

I/O = Input/Output

OE = Output Enable

VCC = Supply Voltage

PLCC/LCC

3 2 1 20 19

I3 4

I4 5

I5 6

I6 7

I7 8

9 10 11 12 13

18 I/O6

17 I/O5

16 I/O4

15 I/O3

14 I/O2

16493D-3

PALCE16V8 Family

2-37

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