MC14538BFL2 Просмотр технического описания (PDF) - ON Semiconductor
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MC14538BFL2 Datasheet PDF : 12 Pages
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MC14538B
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ OPERATING CONDITIONS
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ External Timing Resistance
RX
—
5.0
—
(8.)
kΩ
External Timing Capacitance
CX
—
0
—
No
µF
Limit (9.)
8. The maximum usable resistance RX is a function of the leakage of the capacitor CX, leakage of the MC14538B, and leakage due to board
layout and surface resistance. Susceptibility to externally induced noise signals may occur for RX > 1 MΩ..
9. If CX > 15 µF, use discharge protection diode per Fig. 11.
VDD
RX
2 (14)
CX
1 (15)
4 (12)
A
5 (11)
B
3 (13)
RESET
VDD
P1
Vref1
N1
VSS
+
–C1 ENABLE
+ ENABLE
C2
Vref2
–
CONTROL
QR
QR
S RESET LATCH R
Figure 1. Logic Diagram
(1/2 of DevIce Shown)
RQ
OUTPUT
LATCH
SQ
6 (10)
7 (9)
NOTE: Pins 1, 8 and 15 must
be externally grounded
500 pF
VDD
ID
0.1 µF
CERAMIC
RX
VSS CX
RX′
CX′
VSS
Vin
A
CX/RX
B
RESET
A′
B′
RESET′
Q
CL
Q
Q′
CL
CL
Q′
CL
VSS
20 ns
Vin
90%
10%
Figure 2. Power Dissipation Test Circuit and Waveforms
20 ns
VDD
0V
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